One important VLSI device is the static, random-access memory (SRAM). A typical single cell of an SRAM comprises a pair of access transistors to transmit data into and out of the cell, a flip-flop, and a pair of loads for the two transistors that make up the flip-flop. The loads may be, for example, depletionmode transistors, but often they are high-value resistors. Typically, load resistances of 10.sup.8 to 10.sup.12 ohms are used, but even higher resistances may be desirable in order to limit the power dissipated by an operating memory. As a practical matter, resistances greater than 10.sup.14 ohms are undesirable because it is difficult to manufacture a reproducible and stable resistor at such resistance values, and because of spatial constraints on the memory chip. As a general rule, resistors are formed in VLSI circuits as thin strip-like films, which may be either straight or serpentine and are of uniform thickness. As is well known in the art, the total resistance of such structures is evaluated by enumerating the number of squares. That is, a thin-film resistor may be viewed as a series combination of resistors, each consisting of one square section whose transverse dimension (i.e., width) is the full width of the strip, and whose longitudinal dimension (i.e., length) is equal to the transverse dimension. The resistance of each such "square" is equal to the resistivity of the material, multiplied by the length of the square, and divided by the product of the thickness times the width of the square. Because the length and width cancel in the preceding formula, it is clear that the resistance of each square depends only on the resistivity divided by the film thickness. This quantity is called the sheet resistance.
In principle, a thin film could be made arbitrarily narrow, thereby creating arbitrarily many squares of resistance in any given space on a chip. In practice, however, a thin film strip can be made no narrower than the resolution of the lithographic processes used to create it. As a consequence, it is not practical to fabricate a thin-film resistor less than 0.5 .mu.m in width. Resistance can also be raised, in principle, by making the resistive film arbitrarily thin. In practice, however, such a film cannot be substantially less than 100 .ANG. in thickness, because films tend to become discontinuous when the thickness is less than the granularity of the deposited material.
For the reasons described above, it is difficult to fabricate a thin-film resistor having a sheet resistance of more than about 10.sup.10 ohms per square. As a consequence, the load resistors occupy a minimum of about 30% of the total area occupied by a typical memory cell.
High-value resistors for VLSI applications are often made from polycrystalline silicon (polysilicon) that has been ion-implanted to provide the desired resistance. Ion implantation is able to produce stable and reproducible resistance values in polysilicon resistors greater than 10.sup.7 .OMEGA.. Moreover, chip area can be saved by fabricating the load resistors in a polysilicon layer overlying the active area of the memory cell, as described, for example, in S. M. Sze, VLSI Technology, McGraw-Hill Book Company, New York, 1983, pp. 474-475.
In a typical fabrication sequence (as described, e.g., in Sze, op. cit., at pp. 463-464), the second-level polysilicon is initially separated from the source and drain contacts by an oxide layer. That is, after the polysilicon gate material is deposited and doped, and after the source and drain regions are doped by ion implantation through overlying highly doped polysilicon contact regions, the wafers are typically oxidized to provide a dielectric for isolation between the two polysilicon levels. A second oxide, typically a phosphorus-doped CVD silicon oxide, is then deposited. Contact windows are then etched down to the polysilicon source and/or drain contacts (for one end of each resistor), and down to the polysilicon power or ground strips (for the other end of each resistor).
Unfortunately, polysilicon resistors are disadvantageous in some applications where they make contact with the source or drain regions of MOS transistors. That is, when a polysilicon resistor is fabricated in juxtaposition with a highly doped polysilicon source or drain contact, dopants readily diffuse from the contact into the resistor at the elevated temperatures characteristic of subsequent processing steps, such as the densification of the CVD oxide. The diffusion of dopants into the resistors decreases the resistance, reducing their usefulness.
Thus, it is desirable to provide a resistor valued at greater than 10.sup.7 .OMEGA. that occupies substantially reduced chip area per ohm of resistance, and that can be deposited in direct juxtaposition with a highly doped polysilicon contact without suffering from the effects of dopant diffusion. Because the etching of contact windows between the first and second polysilicon layers adds cost and consumes additional area on the chip, it is still more desirable to provide such a resistor which, additionally, requires at most one contact window rather than the two windows currently required.